1. Field of the Invention
The present invention relates to a method for controlling a buffer memory in a data processing apparatus. The method according to the present invention is applicable to a data processing apparatus including a main memory and a central processing unit having a buffer memory for storing a copy of a portion of the information stored in the main memory, wherein speed-up of the access process to the buffer memory is needed.
2. Description of the Related Art
In general, in a data processing device having a buffer memory of the set associative type, in which a copy of a portion of a main memory is stored, there is a problem that if the address to which the writing of an operand data is instructed, is included in a block in the buffer memory to which the writing of the data of the main memory is being carried out, the writing of the operand data into the address of the block is possible only after the writing of the data of the main memory into the block, is completed.
There is further a problem that, even in the case where the writing of the operand data into the address to which the writing of the data of the main memory has been completed is instructed, the writing of the operand data into such address cannot be carried out until the writing of the data of the main memory into the entire block is completed.